Principles of Verifiable RTL Design. a Functional Coding Style Supporting Verification Processes in Verilog Lionel Bening

ISBN: 9781280205897

Published: July 29th 2009

ebook

281 pages


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Principles of Verifiable RTL Design. a Functional Coding Style Supporting Verification Processes in Verilog  by  Lionel Bening

Principles of Verifiable RTL Design. a Functional Coding Style Supporting Verification Processes in Verilog by Lionel Bening
July 29th 2009 | ebook | PDF, EPUB, FB2, DjVu, audiobook, mp3, ZIP | 281 pages | ISBN: 9781280205897 | 4.41 Mb

The first edition of this text offered a common sense method for simplifying and unifying assertion specification by creating a set of pre-defined specification modules that could be instantiated within the designers RTL. Since the release of theMoreThe first edition of this text offered a common sense method for simplifying and unifying assertion specification by creating a set of pre-defined specification modules that could be instantiated within the designers RTL. Since the release of the first edition, an entire industry-wide initiative for assertion specification has emerged based on ideas presented in the first edition.

This initiative is known as the Open Verification Library Initiative. This standard enables the design engineer to specify once, then target the same RTL assertion specification over multiple verification processes, such as traditional simulation, semi-formal and formal verification tools.

The Open Verification Library Initiative is an empowering technology that should benefit design and verification engineers while providing unity to the EDA community. The second edition of Principles of Verifiable RTL Design expands the discussion of assertion specification.



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